Abstract—Miniaturization has been a constant challenge tomeet the demands of high performance, high density, lower power, and lowervoltage complex devices. Miniaturization is the main drive force for themigration from micro electronic device structures to nano electronic devicestructures. Planar CMOS scaling has been delivering better performance &low power devices at each cutting edge of the technology node for more than threedecades.

Now, CMOS scaling is facing crucial limitations and some show stoppersare affecting bulk CMOS scaling. So, Semiconductor industry is witnessing thephase-out of Planar CMOS with the introduction of new device architecture like 3DFinFET technology for extending the Moore’s Law for Nanoscale technologies. Thispaper discusses the evolution of Planar CMOS technology, CMOS Scalingchallenges, Planar CMOS Optimization technologies & the next generationNano architectures in order to extend the scaling beyond planar CMOS. FinFET isemerging technology beyond 22nm. This paper studies FinFET architecture, advantagesand manufacturing challenges associated with it.

It also throws light on futuretechnologies like Carbon nanotube, Silicon Nanowire FET and Tunneling FET etc.