1. Title of the project On Chip CMOS Low DropOutVoltage Regulator 2. Need for the study Theincreasing need for portable battery solutions has driven low power supplydesigns. Regulators are an essential part of the ever-growing family ofportable battery-operated devices which are required to minimize the voltagevariations of the battery to acceptable levels. As a result, demand for SoCsolutions has increased the interest in LDO voltage regulators which is aconsequence of requirement of smaller portable products.
3. Objectives (Bullet points) · Focus onthe realization of current efficient, low voltage, LDO Voltage Regulator.· ControlLogic to optimise the power consumption.· Developsuitable circuit topologies for the realization of low dropout regulatorsworking at low input voltages and low quiescent current flow without hamperingits performance. 4. Literature Review Review of various fundamental topics requiring for the betterunderstanding of the various topologies developed over the years includingstudy of Circuit Analysis, Amplifiers, MosFET, Stability Analysis using Bodeplots. Effects of large external bulkycapacitor used for stability requirements. 5.
Work Plan (Include Detailed Methodology with Time Schedule) Understanding the various shortcomings and limitations imposed byvarious topologies designed over the years.Acquaintance with Software required during the course of theproject.Developing new methodologies to overcome the existing problems andthereby, improving the performance. 6. ReferencesMilliken, Robert J., Jose Silva-Martínez,and Edgar Sánchez-Sinencio. “Full on-chip CMOS low-dropout voltageregulator.
” IEEE Transactions on Circuits and Systems I: RegularPapers54.9 (2007): 1879-1890.Torres, Joselyn, MohamedEl-Nozahi, Ahmed Amer, Seenu Gopalraju, Reza Abdullah, Kamran Entesari, andEdgar Sanchez-Sinencio. “Low drop-out voltage regulators: Capacitor-lessarchitecture comparison.
” IEEE Circuits and Systems Magazine 14,no. 2 (2014): 6-26.Current Efficient, LowVoltage, Low Droup-Out Regulators by Gabriel Alfonso Rincon-Mora. 7. Expected Knowledge to be gainedafter completion of the project (Bullet points) · SoC designing · Fluency with Cadence ToolsSimulations.
Signatureof the student Name:A LOHITH IDNo: 2015A3PS0215H